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ARCHITECTURE Datasheet, PDF

Search Description : 'ARCHITECTURE' - Total: 354 (1/18) Pages
Electronic ManufacturerPart NumberDatasheetElectronics Description

Cypress Semiconductor
CY7C1379B 9-Mbit (256K x 32) Flow-through SRAM with NoBL™ Architecture
CY7C1516V18 72-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1351G 4-Mbit (128K x 36) Flow-through SRAM with NoBL™ Architecture
CY7C1460AV25 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL™ Architecture
CY7C1471V33_13 72-Mbit (2 M x 36) Flow-Through SRAM with NoBL™ Architecture
CY7C1461AV33_12 36-Mbit (1 M × 36/2 M × 18) Flow-Through SRAM with NoBL™ Architecture
CY7C1266KV18 36-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

Exar Corporation
XRT86SH328_2 SONET TO 28-T1/21-E1 PDH MAPPER - VOYAGER PIN AND ARCHITECTURE DESC

Cypress Semiconductor
CY7C1513KV18 72-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1371DV25 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL™ Architecture
CY7C1511V18_06 72-Mbit QDR™- II SRAM 4-Word Burst Architecture
CY7C1470BV25_09 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL™ Architecture
CY7C1470BV33 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture
CY7C1303AV18 18-Mb Burst of 2 Pipelined SRAM with QDR™ Architecture
CY7C1410BV18 36-Mbit QDR-II™ SRAM 2-Word Burst Architecture
CY7C1354CV25 9-Mbit ( 256K x 36/512K x 18 ) Pipelined SRAM with NoBL-TM Architecture

Altera Corporation
EPM7192SQC160-15 High-performance, EEPROM-based programmable logic devices PLDs) based on second-generation MAX architecture

Cypress Semiconductor
CY7C2568XV18_12 72-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
CY7C1302DV25_11 9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture JTAG Interface
CY7C1312CV18_11 18-Mbit QDR® II SRAM 2-Word Burst Architecture

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