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MUX DE-MUX Datasheet, PDF

Search Description : 'Mux De-mux ' - Total: 255 (1/13) Pages
Electronic ManufacturerPart NumberDatasheetElectronics Description

Micrel Semiconductor
SY89845U_10 Precision CML Runt Pulse Eliminator 2:1 MUX
SY58026U_0708 ULTRA PRECISION DUAL 2:1 LVPECL MUX WITH INTERNAL TERMINATION
SY89837U_10 PRECISION 1:8 LVPECL FANOUT BUFFER WITH 2:1 RUNT PULSE ELIMINATOR INPUT MUX
SY58609U_10 4.25Gbps Precision, CML 2:1 MUX with
SY56572XR_1009 Low Voltage 1.2V/1.8V/2.5V CML 4:1 MUX with 1:2 FANOUT 6.4Gbps with EQUALIZATION
SY54017R Low Voltage 1.2V/1.8V CML 2:1 MUX with Fail Safe Inputs, 3.2Gbps, 2.5GHz
SY58030U_0708 ULTRA PRECISION, 400mV DIFFERENTIAL LVPECL 4:1 MUX with 1:2 FANOUT

Texas Instruments
SN65LVCP114 14.2-Gbps Quad 1:2-2:1 MUX, Linear-Redriver With Signal Conditioning

Maxim Integrated Produc...
MAX9765 750mW Audio Amplifiers with Headphone Amp, Microphone Preamp, and Input Mux

National Semiconductor
LM4839 Stereo 2W Audio Power Amplifiers with DC Volume Control, Bass Boost, and Input Mux

Pericom Semiconductor C...
PI3B3251 3.3V 8:1 MUX /DEMUX BUS SWITCH

Integrated Device Techn...
IDT74CBTLVR16292 LOW-VOLTAGE 12-BIT 1:2 MUX / DEMUX BUS SWITCH WITH INTERNAL PULL DOWN RESISTORS

Texas Instruments
TPA0312 2.6-W STEREO AUDIO POWER AMPLIFIER WITH FOUR SELECTABLE GAIN SETTINGS AND MUX CONTROL

Micrel Semiconductor
SY89113U 2.5V Low Jitter, Low Skew 1:12 LVDS Fanout Buffer with 2:1 Input MUX and Intermal Termination

Texas Instruments
TPS2114A AUTOSWITCHING POWER MUX

Analog Devices
ADG849 3 V/5 V CMOS 0.5 Ω SPDT/2:1 Mux in SC70

Micrel Semiconductor
SY89855U Precision Low Power Differential LVPECL 4:1 MUX with 1:2 Fanout and Internal Termination

Pericom Semiconductor C...
PI6C4853111 2.5V/3.3V 500MHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer with 2 to 1 Differential Clock Input Mux

Analog Devices
ADG824 0.5 Ω CMOS 1.65 V to 3.6 V Dual SPDT/2:1 Mux in Mini LFCSP Package

Texas Instruments
THS7347 3-Channel RGBHV Video Buffer with I2C™ Control, 2:1 Input Mux, Monitor Pass-Through, and Selectable Input Bias Modes

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